1. Field of the Invention
The present invention relates to a PCI (peripheral component interconnect) bridge for interfacing a PCI bus and a local bus, and more particularly, to a PCI bridge which can accommodate a problem, such as a change of a PCI bus standard, by reconstructing interface logic.
2. Description of Related Art
In general, information handling system includes more than one bus, and devices connected to each bus perform communication such as data transmission via the buses. For example, a typical computer system includes a local bus to which a central processing unit (CPU) is attached, and the CPU communicates with other devices connected to the local bus, through the local bus. Meanwhile, such a system may also include one or more peripheral buses such as a peripheral component interconnect (PCI) bus. Peripheral devices such as an input/output device, etc. are connected to the peripheral bus.
However, the local and peripheral buses use different standards to conduct data transfer between devices connected to these buses and different devices. Also, the respective buses are manufactured in accordance with different standards. A device for interfacing buses which use different standards is called a bridge. In particular, a bridge for interfacing a local bus and a PCI bus is called a PCI bridge.
FIG. 1 is a schematic block diagram of a computer system including a PCI bridge. Referring to FIG. 1, a central processing unit (CPU) 101, a memory 102 and a local peripheral device 103 are connected to a local bus 100 along with various other devices (not shown). A PCI peripheral device 111 is connected to a PCI bus 110. The local bus 100 is connected to the PCI bus 110 via a PCI bridge 120. In such a system, the PCI bridge 120 interfaces the local and PCI buses 100 and 110. That is, in transmitting data, addresses and control signals between the two buses, the PCI bridge 120 overcomes the inconsistency between the standards of two buses.
FIG. 2 is a block diagram of a conventional PCI bridge 200. The conventional PCI bridge 200 includes PCI and local registers 210 and 220 which store configuration information on the PCI bus and on the local bus, respectively, when the PCI bridge is initialized according to a reset signal from the PCI bus 110. Also, the conventional PCI bridge 200 further includes PCI bus interface logic 230 for reading the configuration information stored in the PCI register 210 according to a PCI bus cycle and outputting a request command such as an address designation, read command or write command, and local bus interface logic 240 for reading information stored in the local register 220 according to the PCI bus cycle and performing interfacing according to the request command from the PCI bus interface logic 230. In the conventional PCI bridge 200 having such components, the configuration information to be stored in the PCI and local registers 210 and 220 is stored in a serial EEPROM (not shown) connected to the PCI bridge 200, and the configuration information is written to the PCI and local registers 210 and 220 according to the reset signal from the PCI bus 110. The above-described process in which the PCI bridge 200 reads the configuration information from the serial EEPROM and writes the same to the PCI and local registers 210 and 220 is referred to as an initialization.
The initialization of the PCI bridge 200 will now be described referring to FIG. 3.
When power is switched on, a reset signal is received from the PCI bus 110, in step 300. Next, the PCI and local registers 210 and 220 read the configuration information from the serial EEPROM in step 310, and then set the PCI and local buses 110 and 100 in step 320. After the initialization is accomplished, the PCI bridge 200 performs interfacing according to a command cycle from the PCI bus 110.
The conventional PCI bridge 200 is comprised of a logic circuit composed only of registers, so all PCI standards must be supported upon designing and manufacturing the conventional PCI bridge. However, the PCI standards of manufacturing companies are not consistent, and are also continuously upgraded. Such up-grades may be downward-compatible, but often that is not possible due to the nature of the technical advances between versions. Therefore, the bridges must be continuously upgraded, a user must avoid using particular functions, or the BIOS of an applied system must be changed.